This invention relates generally to techniques and devices for protecting electronic circuits from undesired high voltage, particularly the protection of integrated circuit chips from high voltage spikes resulting from electrostatic discharges from handling of packaged circuits.
From the beginning of metal-oxide-silicon (MOS) integrated circuit semiconductor technology, it has been recognized that electrostatic discharges through the circuit that result from human handling of a finished chip product can permanently affect the operation of the circuit in undesirable ways. Principally, a thin oxide layer that isolates a gate electrode from the substrate of an MOS field effect transistor can be irreparably ruptured by a voltage spike being applied across it. In many cases, a gate electrode is connected in a signal path to a pin of a packaged integrated circuit, so the possibility of damage occurring in handling is very high, unless some protection circuitry is provided within the package.
The goal in providing such a protection circuit is to shunt the undesired voltage spikes around the sensitive field effect transistors without affecting the operation of the transistor and its signal paths to the integrated circuit package pins. An early technique was to provide a diode between a wire bonding connection pad and the integrated circuit substrate. As is well known, a wire is bonded between an integrated circuit package pin and a pad on the chip itself. It was found, however, that this did not provide adequate protection because the diode operated too slowly, resulting in the fragile gate oxide being ruptured before the diode operated to shunt the voltage spike around the transistor. The simple diode also has a breakdown voltage that is large compared to that of the thin oxide of the device to be protected. Another attempt involved the use of Zener diodes as shunting devices, but difficulties in reproduceability of Zener diodes in mass integrated circuit production caused that technique to be abandoned.
Others used diffused resistors in series connection between the pad and the transistor to be protected. A diffused resistor inherently forms a diode at its junction with the substrate, and further inherently possesses capacitance that, in combination with the resistance, provides a delay line. The delay of an undesired pulse in reaching the protected device provides more opportunity to shunt it around the transistor, but the diodes themselves do not do so adequately. Yet others have used thin and thick film field effect transistors as shunting devices, either alone or in combination with diffused resistors.
The result with current techniques is that existing integrated circuits are provided adequate protection against voltages above approximately 50 volts. The gate oxides presently utilized are in the 500-700 Angstrom range and can withstand the resulting 50 or so volts without damage. However, continuing development of integrated circuit technology is resulting in a new generation of MOS devices with thinner gate oxides. Currently proposed are 400 Angstrom thick gate oxide layers, with plans to go to a 250-300 Angstrom thickness and perhaps thinner (such as 200 Angstroms or even less) in a short period of time. A 300 Angstrom gate oxide can withstand only 30-35 volts across it without damage, and the thinner layers proportionately less. Therefore, existing circuits that provide protection of voltage spikes in excess of 50 volts are no longer adequate.
Accordingly, it is a primary object of the present invention to provide a circuit and technique for reducing any undesired voltage spikes to something less than 30-35 volts, and preferably to within approximately a 10-15 volt range and lower for the very thin gate oxides.
It is another object of the present invention to provide a circuit and technique giving protection against lower voltages that do not trigger the existing shunting circuits but yet which can damage such thin oxides.
It is a further object of the present invention to provide such protection without adversely affecting the operation of the circuit which is being protected, particularly to maintain reliability and speed of operation of the circuit.